The present invention relates to electronic circuits, and in particular, to a digital interface for radio receiver integrated circuits.
Conventionally, a radio receiver integrated circuit (radio IC) uses an analog interface to communicate with a demodulator integrated circuit. The radio IC delivers one or more analog intermediate frequency (IF) signals or analog baseband in-phase/quadrature (I/Q) signals to the demodulator IC and receives an analog automatic gain control (AGC) signal from the demodulator.
FIG. 1 is a block diagram of a conventional radio IC (hereinafter alternatively referred to as radio) 10 in communication with a demodulator IC (hereinafter alternatively referred to as demodulator) 50, as known in the prior art. Radio 10 is shown as including an analog front end 12 and an analog circuit block 14 adapted to generate signal B that is either an analog intermediate frequency (IF) signal or an analog baseband in-phase/quadrature (I/Q) signal. Demodulator 30 is shown as including an analog-to-digital converter (ADC) 16, a digital baseband modem 18, and a digital-to-analog converter 20. Signal B is converted from analog to digital by ADC 16 and then delivered to digital baseband modem 18. Output signal D of baseband modem 18 is subsequently converted from digital to analog and then delivered to analog front end (AFE) 14 to set the gain of AFE 14.
The analog signals that pass between the radio 10 and demodulator 10 are subject to degradation from interference. Furthermore, a high-performance ADC is a complex mixed digital-analog circuit that is difficult to design. Demodulator 20 is typically formed using advanced technology processes. Therefore, forming ADC 16 in demodulator 30 poses a significant technology development barrier.